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OCR: Table 1. Simple categorization of relaxed models. W-R R -RW Rend others" Read own Relaxation order order order Write early write carly Safety net SC IBM 370 Serialization instructions TSO: Read-modify-write PC Read-modity-write PSO Read-modify-write, STBAR Synchronization Release, acquire, nsync, read-modify-write Release, acquire, nsync, read-modify-write Alphas MB. WMB RMO' Various MEMBARS PowerPC' Syrx A / indicates that the corresponding relaxation is allowed by straightforward implementations of the corresponding model. It also indicates that the relaxation can be detected by the programmer (by affecting the results of the program) except for the following cases. The read own write early relaxation is not detectable with the SC, WO, Alpha, and PowerPC models. The read others" write early relaxation is possible and detectable with complex Implementations of RCsc. 1. E. Lamport, "How to Make a Multiprocessor Computer that Correctly Executes Multiprocess Programs," JEEE Trans, Computers. Sept. 1979, pp. 690-691, 2. IBM System370 Principles of Operation, IBM Pub. GA22-7000-9, File 5370-01, 1983 3. SPARC Architecture Manual, D.L. Weaver and T. Germond, eds, Prentice Hall, Englewood Cliffs, NJ. 1994 4. K. Gharachorlco et al ., "Memory Consistency and Event Ordering in Scalable Shared Memory Multiprocessors, " Proc, 17th Int'l Symp. Computer Architecture, 1990, pp. 15-26 5. M. Dubois, C. Scheurich, and F. Briggs, "Memory Access Buffering in Multiprocessors," Prot, 13th Int'l Symp. Computer Architer. ture, IEEE CS Press, Los Alamitos, Calif ., 1986, pp. 434-442. 6. Alpha AXP Architecture Reference Manual 2- Ed ., R.I .. Sites and R.T. Witek, eds ., Digital Press, Sostori 1995. 7. The PowerPC Architecture: A Specification for a New Family of RISC Processors, C. May et al ., eds, Morgan Kaufmann, San Francisco, 1994